KRS Unleashed: Easier Hardware Acceleration Prototyping on FPGA

Hey All,

I want to present KRS Unleashed, the tool I am now developing/refactoring/extending since 1 year as part of my PhD.

Some of you might still know KRS (short for Kria Robotic Stack as originally developed by Xilinx/AMD for their Kria platform) as the toolchain developed until 2023 by the ROS 2 Hardware Acceleration Working Group · GitHub .

(Short Summary for those who don’t)


It was a proof-of-concept framework that allowed to synthesize bitstreams, create a sysroot and cross-compile application against it to create robotics applications running on KV260, KR260 (and also claimed jetson, Ultra96v2,.. but i have never tested/verified that so far). So basically the main point of it is to replace this “docker container to compile” flow with ROS 2 colcon mixin and in parallel integrate all the necessary and optional things for hardware acceleration like sysroot creation or vendor-driven bitstream synthesis in a ROS 2 command.


The flow works, but I found it really hard to use:

  • long build times whenever you cleaned your build/install folders, as even the sysroot and bitstream needed to resynthesize when you just changed a variable in a package (if you know what you are doing you can keep the untouched compiled packages but its not really stable nor trivial)
  • cross-references and dependency cycles made it hard to change configuration like different Vitis version, other firmware OS,..
  • hard to understand what each package actually did and which ones were necessary for your task - the original guide simply copied all available packages in

Basically it wasn’t really fun to use and whenever you start with a new project, you fight cmake configurations for a while until you can start coding..


My tool refactored these individual components into 3 separate logical workspaces:

  • os → for firmware and sysroot creation - allows to reuse across projects (save lots of memory space, no rebuild necessary, parallel development possible by different team)
  • vitis → vendor-driven toolchain necessary to automate your “accelerator bitstream flow”. I refactored also the automation into a nice Python CLI scripted way such that I can also use the Vitis workspace and manually adjust things, but this is more a FPGA developer nice-to-have. Could also be replaced with a flow for other accelerators
  • krs → lightweight integration of firmware via single package, that provides the colcon mixin integration. Further a tracetools-kernels package that allows to trace arbitrary code regions in any ROS 2 application extending ros-tracing.

You can also use any of these components in isolated areas - I use for example also vitis + os for standalone faster iteration on host code variations. It might be a little bit harder to setup for the first time, but I can iterate really fast with it (built times up to 80x faster) and the setup is the same for all projects so once you understand it, its relatively easy and doesn’t require changes all over the project but just in very small, well defined areas.


I also created a Hackster Series for the brave.

I continue to develop it, current public version is still humble but I already have an internal jazzy version which I will release once I published a new paper.

Github: GitHub - TUD-ADS/KRS-Unleashed · GitHub

Hackster Series (5 Parts): 1. Getting Started

Paper: https://ieeexplore.ieee.org/document/11231288/

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